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19-1784; Rev 0; 7/00
Fan-Speed Regulators and Monitors with I2C/SMBus Interface
General Description
The MAX6650/MAX6651 fan controllers use an I2CTM/ SMBusTM-compatible interface to regulate and monitor the speed of 5VDC/12VDC brushless fans with built-in tachometers. They automatically force the fan's tachometer frequency (fan speed) to match a preprogrammed value in the Fan-Speed Register by using an external MOSFET or bipolar transistor to linearly regulate the voltage across the fan. The MAX6650 regulates the speed of a single fan by monitoring its tachometer output. The MAX6651 also regulates the speed of a single fan, but it contains additional tachometer inputs to monitor up to four fans and control them as a single unit when they are used in parallel. The MAX6650/MAX6651 provide general-purpose input/output (GPIO) pins that serve as digital inputs, digital outputs, or various hardware interfaces. Capable of sinking 10mA, these open-drain inputs/outputs can drive an LED. To add additional hardware control, configure GPIO1 to fully turn on the fan in case of software failure. To generate an interrupt when a fault condition is detected, configure GPIO0 to behave as an activelow alert output. Synchronize multiple devices by setting GPIO2 (MAX6651 only) as an internal clock output or an external clock input. The MAX6650 is available in a space-saving 10-pin MAX package, and the MAX6651 is available in a small 16-pin QSOP package.
____________________________Features
o Closed/Open-Loop Fan-Speed Control for 5V/12V Fans o 2-Wire I2C/SMBus-Compatible Interface o Monitors Tachometer Output Single Tachometer (MAX6650) Up to Four Tachometers (MAX6651) o Programmable Alert Output o GPIOs o Hardware Full-On Override o Synchronize Multiple Fans o Four Selectable Slave Addresses o +3V to +5.5V Supply Voltage o Small Packages 10-Pin MAX (MAX6650) 16-Pin QSOP (MAX6651)
MAX6650/MAX6651
Ordering Information
PART MAX6650EUB MAX6651EEE TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 10 MAX 16 QSOP
________________________Applications
RAID Servers Workstations Desktop Computers Networking Telecommunications
I2C is a trademark of Philips Corp. SMBus is a trademark of Intel Corp. Pin Configurations appear at end of data sheet
Typical Operating Circuit
VFAN 5V OR 12V VCC 3V TO 5.5V VCC 10k
MAX6650
I2C/SMBus INTERFACE SCL SDA TACH0 FB FAN
LED ALERT FULL ON GPIO0 GPIO1 OUT ADD GND CCOMP 10F
________________________________________________________________ Maxim Integrated Products
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +6V FB, TACH_ ..........................................................-0.3V to +13.2V All Other Pins..............................................-0.3V to (VCC + 0.3V) Output Voltages..........................................-0.3V to (VCC + 0.3V) Maximum Current Into VCC, GND, VOUT ...................................................100mA Into All Other Pins ..........................................................50mA Continuous Power Dissipation (TA = +70C) 10-Pin MAX (derate 5.6mW/C above +70C) ..........444mW 16-Pin QSOP (derate 8.3mW/C above +70C)..........667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature .....................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +5.5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C and VCC = +5V.) PARAMETER POWER SUPPLY (VCC) Supply Voltage Supply Current OUTPUT (OUT) Output Voltage Range Output Sink Current Output Source Current TACHOMETER INPUTS (TACH_) Tachometer Threshold Tachometer Input Impedance FEEDBACK (FB) DAC Differential Nonlinearity Useful DAC Resolution Feedback Input Impedance Input Low Voltage Input High Voltage Input Hysteresis Pullup Resistor Output Sink Current RFB VIL(GPIO_) VIH(GPIO_) VHYS RGPIO_ IGPIO_ VGPIO_ = 0.4V 10 VCC 3.6V VCC > 3.6V 2 3 200 100 Guaranteed monotonicity on FB (Note 1) Measured at FB (Note 1) 0 < VFB < 9V 70 100 5 8 150 0.8 LSB bits k VTACH_ RTACH_ 5V fan, 0 < VFB < 4.5V 12V fan, 0 < VFB < 9V 0 < VTACH < 9V VFB + 0.5 VFB + 1.0 70 100 VFB +1.5 VFB +3 150 V k VOUT ISINK ISOURCE IOUT = 100A VOUT = 0.5V VOUT = VCC - 1.8V 0.3 10 50 VCC - 0.3 V mA mA VCC ICC Full-on mode, IOUT = 0 3.0 5.5 10 V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
GENERAL-PURPOSE INPUTS/OUTPUTS (GPIO_) (Note 2)
V V
mV k mA
2
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +5.5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C and VCC = +5V.) PARAMETER ADDRESS SELECT (ADD) ADD Input Low Voltage ADD Input High Voltage ADD External Pulldown Resistor to GND Open Resistance ADD Pullup Current I2C/SMBus INTERFACE (SDA, SCL) Data Output Sink Current Input Leakage Current Input Low Voltage Input High Voltage Input Hysteresis VIL VIH VHYS VCC 3.6V VCC > 3.6V 2 3 200 ISDA VSDA = 0.6V 0 < VIN < VCC 6 1 0.8 mA A V V mV VIL(ADD) VIH(ADD) RADD ROPEN IADD Selects slave address 1001 000 (Table 1) Selects slave address 1001 011 (Table 1) Selects slave address 0111 111 (Table 1) Minimum resistance to GND, selects slave address 0011 011 (Table 1) VADD = 0.5V VCC - 0.05V 9.5 5 40 80 10.5 0.1 V V k k A SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX6650/MAX6651
TIMING CHARACTERISTICS
(VCC = +3.0V to +5.5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C and VCC = +5V.) PARAMETER TACHOMETERS Glitch Rejection GPIO2 (Note 2) Clock Frequency Clock Frequency Uncertainty fCLK fCLK VCC = 5V -10 0 1.3 0.6 1.3 0.6 (Note 3) 0 100 (Note 4) (Note 4) ISINK < 6mA (Note 4) 20 + 0.1CB(pf) 20 + 0.1CB(pf) 20 + 0.1CB(pf) 300 300 250 900 254 +10 400 kHz % kHz s s s s s ns ns ns ns Minimum pulse duration 500 s SYMBOL CONDITIONS MIN TYP MAX UNITS
I2C/SMBus INTERFACE (Figures 3, 4) SCL Clock Frequency fSCL Bus Free Time Between Stop and Start Condition Hold-Time Start Condition Low Period of the SCL Clock High Period of the SCL Clock Data Hold Time Data Setup Time Rise-Time SDA/SCL Signal (Receiving) Fall-Time SDA/SCL Signal (Receiving) Fall-Time SDA Signal (Transmitting) tBUF tHD:STA tLOW tHIGH tHD:DAT tSU:DAT tR tF tF
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
TIMING CHARACTERISTICS (continued)
(VCC = +3.0V to +5.5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C and VCC = +5V.) PARAMETER Setup Time for Stop Condition Pulse Width of Spike Suppressed SYMBOL tSU:STO tSPIKE CONDITIONS MIN 0.6 0 50 TYP MAX UNITS s ns
Note 1: For proper measurement of VFB, connect OUT and FB as shown in the Typical Operating Circuit. Note 2: GPIO2, GPIO3, and GPIO4 only in the MAX6651. Note 3: Note that the transition must internally provide at least a hold time to bridge the undefined region (300ns max) of SCL's falling edge. Note 4: CB is the total capacitance of one bus line in pF. Tested with CB = 400pF. Rise and fall times are measured between 0.3 x VCC and 0.7 x VCC.
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
INTERNAL OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE
MAX6650/51-01
INTERNAL OSCILLATOR FREQUENCY vs. TEMPERATURE
MAX6650/51-02
FEEDBACK VOLTAGE vs. TEMPERATURE
MAX6650/51-03
265
300
2.5 2.4 FEEDBACK VOLTAGE (V) 2.3 2.2 2.1 2.0 1.9 VFAN = +12.0V, VFAN = +5.5V VCC = +3.0V VCC = +5.5V, VFAN = +5.5V, VFAN = +12.0V
260 FREQUENCY (kHz)
280 FREQUENCY (kHz) VCC = +5.5V 260
255
250
240
VCC = +3.0V
245
220
240 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
200 -50 0 50 100 TEMPERATURE (C)
1.8 -50 0 50 100 TEMPERATURE (C)
FEEDBACK VOLTAGE vs. SUPPLY VOLTAGE (DAC SET TO 35)
MAX6650/51-04
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX6650/51-05
SUPPLY CURRENT vs. TEMPERATURE
VCC = +5.5V 3.5 SUPPLY CURRENT (mA)
MAX6650/51-06
2.20 2.15 FEEDBACK VOLTAGE (V) 2.10 2.05 2.00 1.95 1.90 1.85 1.80 3.0 3.5 4.0 4.5 5.0 VFAN = +12.0V VFAN = +5.5V
3.8 3.6 SUPPLY CURRENT (mA) 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0
4.0
3.0
2.5
VCC = +3V
2.0
5.5
1.5 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 SUPPLY VOLTAGE (V) -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
SUPPLY VOLTAGE (V)
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface
Pin Description
PIN MAX6650 1 -- 2 3 4 5 -- 6 7 -- 8 9 10 PIN NAME MAX6651 1 2, 3, 16 4 5 6 8 7, 12 9 10 11 13 14 15 TACH0 TACH2, TACH3, TACH1 GND SDA SCL ADD GPIO4, GPIO3 GPIO1 GPIO0 GPIO2 OUT VCC FB Tachometer Input. Used to close the loop around the tachometer. Tachometer Inputs. Used to monitor tachometers only. Ground 2-Wire Serial-Data Input/Output (open drain) 2-Wire Serial Clock Input Slave Address Select Input (Table 1) General-Purpose Input/Output (open drain) General-Purpose Input/Output (open drain). Configurable to act either as an output or as an input (FULL ON or general purpose). General-Purpose Input/Output (open drain). Configurable to act as a general input/output line or an active-low ALERT output. General-Purpose Input/Output (open drain). Configurable to act as a general input/output line, an internal clock output, or an external clock input. Output. Drives the external MOSFET or bipolar transistor. +3.0V to +5.5V Power Supply Feedback Input. Closes the loop around the external MOSFET or bipolar transistor. FUNCTION
MAX6650/MAX6651
Detailed Description
The MAX6650/MAX6651 use an I2C/SMBus interface to regulate and monitor the speed of 5VDC/12VDC brushless fans with built-in open-collector/drain tachometers. Regulating fan speed proportionally with temperature saves power, increases fan life, and reduces acoustic noise. Since fan speed is proportional to the voltage across the fan, the MAX6650/MAX6651 control the speed by regulating the voltage on the low side of the fan with an external MOSFET or bipolar transistor. The MAX6650/MAX6651 each contain two internal control loops. The first loop controls the voltage across the fan. The internal digital-to-analog converter (DAC) sets the reference voltage for an internal amplifier (Figure 1), which then drives the gate of an external N-channel MOSFET (or the base of a bipolar transistor) to regulate the voltage on the low side of the fan. As the reference voltage provided by the DAC changes, the feedback amplifier automatically adjusts the feedback voltage, which changes the voltage across the fan.
The second control loop consists of the internal digital logic that controls the fan's speed. The MAX6650/ MAX6651 control fan speed by forcing the tachometer frequency to equal a reference frequency set by the Fan-Speed Register, the prescaler, and the internal oscillator (see the Fan-Speed Register section). When the tachometer frequency is too high, the value of the DAC's input register is increased by the regulator. Once the DAC voltage increases, the analog control loop forces the feedback voltage to rise, which reduces the voltage across the fan. Since fan speed is proportional to the voltage across the fan, the fan slows down.
2-Wire I2C/SMBus Digital Interface
From a software perspective, the MAX6650/MAX6651 appear as a set of byte-wide registers that contain speed control, tachometer count, alarm conditions, or configuration bits. These devices use a standard I2C/SMBus 2-wire serial interface to access the internal registers.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
VFAN = 5V OR 12V
VCC 3V TO 5.5V
VCC
I2C/SMBus INTERFACE FAN SPEED
MAX6650 MAX6651
10k
90k
TACH0
FAN
SCL I2C/SMBus INTERFACE SDA
CONFIGURE ALARM ENABLE ALARM STATUS TACH COUNT COUNT TIME GPIO DEF GPIO STATUS DAC CONTROL LOGIC 10k OUT TACHOMETER COUNT
FB VOFFSET 90k
ADD
ADDRESS DECODE
8-BIT DAC VREF GPIO BLOCKS (FIGURE 5)
GPIO0 GPIO1
ALERT FULL ON
10k GND
Figure 1. Block Diagram
The MAX6650/MAX6651 employ three standard SMBus protocols: write byte, read byte, and receive byte (Figure 2). The shorter protocol (receive) allows quicker transfers, provided that the correct data register was previously selected by a write or read byte instruction. Use caution with the shorter protocol in multimaster systems, since a second master could overwrite the command byte without informing the first master.
Table 1. Slave Address Decoding (ADD)
ADDRESS ADD BINARY GND VCC No connection (high-Z) 10k resistor to GND 1001 000 1001 011 0011 011 0111 111
Slave Addresses
The device address can be set to one of four different values. Accomplish this by pin-strapping ADD so that more than one MAX6650/MAX6651 can reside on the same bus without address conflicts (Table 1).
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
S ADDRESS 7 bits Slave Address WR 0 ACK COMMAND 8 bits Command byte: Selects which register you are writing to. ACK DATA 8 bits Data byte: Data goes into the register set by the command byte (to set thresholds, configuration masks, and sampling rate). ACK P
Figure 2a. SMBus Protocol: Write Byte Format
S
ADDRESS 7 bits Slave Address
WR 0
ACK
COMMAND 8 bits Command byte: Selects which register you are reading from.
ACK
S
ADDRESS 7 bits Slave Address. Repeated due to change in data-flow direction
RD 1
ACK
DATA 8 bits Data byte: Reads from the register set by the command byte.
A
P
Figure 2b. SMBus Protocol: Read Byte Format
S
ADDRESS 7 bits Slave Address
RD 1
ACK
DATA 8 bits Data byte: Reads data from the register commanded by the last read-byte or write-byte transmission; also used for SMBus alert response return address.
A
P
Figure 2c. SMBus Protocol: Receive Byte Format S = Start condition P = Stop condition Shaded = Slave transmission ACK = Acknowledged = 0 A = Not acknowledged = 1 WR = Write = 0 RD = Read =1
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
A tLOW B tHIGH C D E F G H I J K L M
SMBCLK
SMBDATA
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA LINE LOW
tSU:STO tBUF J = ACKNOWLEDGE CLOCKED INTO MASTER K = ACKNOWLEDGE CLOCK PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION
A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW
Figure 3. SMBus Write Timing Diagram
A tLOW
B tHIGH
C
D
E
F
G
H
I
J
K
SMBCLK
SMBDATA
tSU:STA tHD:STA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE
tSU:DAT E = SLAVE PULLS SMBDATA LINE LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO MASTER H = LSB OF DATA CLOCKED INTO MASTER
tSU:STO I = ACKNOWLEDGE CLOCK PULSE J = STOP CONDITION K = NEW START CONDITION
tBUF
Figure 4. SMBus Read Timing Diagram
Command-Byte Functions
The 8-bit Command-Byte Register (Table 2) is the master index that points to the various other registers within MAX6650/MAX6651. The register's power-on reset (POR) state is 0000 0000, so that a receive-byte transmission (a protocol that lacks the command byte) occurring immediately after POR returns the current speed setting.
tachometer pulses, so the required Fan-Speed Register value (KTACH) may be calculated as: tTACH = 1 / (2 x Fan Speed) KTACH = [tTACH x KSCALE x (fCLK / 128)] - 1 where the fan speed is in rotations per second (RPS), tTACH is the period of the tachometer signal, fCLK is the internal oscillator frequency (254kHz 10%), and KSCALE is the prescaler value (see Configuration-Byte Register). Since the fan speed is inversely proportional to the tachometer period, the Fan-Speed Register value (KTACH) does not linearly control the fan speed (Table 3). Select the prescaler value so the fan's full speed is achieved with a register value of approximately 64 (0100 0000) to optimize speed range and resolution. The MAX6651 may be controlled by an external oscilla-
Fan-Speed Register
In closed-loop mode, the MAX6650/MAX6651 use the Fan-Speed Register to set the period of the tachometer signal that controls the fan speed. The Fan-Speed Register is ignored in all other modes of operation. The MAX6650/MAX6651 regulate the fan speed by forcing the tachometer period (tTACH) equal to the scaled register value. One revolution of the fan generates two
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
Table 2. Command-Byte Assignments
REGISTER SPEED CONFIG GPIO DEF DAC ALARM ENABLE ALARM TACH0 TACH1 TACH2 TACH3 GPIO STAT COUNT COMMAND 0000 0000 0000 0010 0000 0100 0000 0110 0000 1000 0000 1010 0000 1100 0000 1110 0001 0000 0001 0010 0001 0100 0001 0110 READ x x x x x x x x x x x x WRITE x x x x x -- -- -- -- -- -- x POR (DEFAULT) STATE 00h 0Ah FFh 00h 00h 00h 00h 00h 00h 00h h1Fh 02h FUNCTION Fan speed Configuration GPIO definition DAC Alarm enable Alarm status Tachometer 0 count Tachometer 1 count Tachometer 2 count Tachometer 3 count GPIO status Tachometer count time
Table 3. Fan Speed
tTACH KTACH 1 0000 0000 0000 0001 0000 0010 -- 0001 1110 0001 1111 0010 0000 -- 0100 0000 -- 1111 1000 1.0 1.0 1.5 -- 16 16 17 -- 33 -- 125 KSCALE (ms) 4 * * * -- 3.9 4.0 4.2 -- 8.2 -- 31 16 * * * -- * 1.0 1.0 -- 2.1 -- 7.8 1 500 500 330 -- 32 31 30 -- 15.3 -- 4 FAN SPEED (RPS) KSCALE 4 * * * -- 128 124 120 -- 61.1 -- 15.9 16 * * * -- * 500 480 -- 240 -- 64 1 30,000 30,000 20,000 -- 1900 1900 1800 -- 910 -- 240 FAN SPEED (RPM) KSCALE 4 * * * -- 7700 7400 7200 -- 3700 -- 960 16 * * * -- * 30,000 29,000 -- 15,000 -- 3830
*The minimum allowed tachometer period is 1ms.
tor that overrides the internal oscillator (see GeneralPurpose Input/Output). When using an external oscillator (fOSC), calculate the Fan-Speed Register value with fCLK equal to f OSC . Codes above F8h (1111 1000) are allowed, but will not significantly decrease the frequency.
Configuration-Byte Register
The Configuration-Byte Register (Table 4) adjusts the prescaler, changes the tachometer threshold voltage, and sets the mode of operation. The three least-significant bits configure the prescaler division used to scale the tachometer period. Select the prescaler value so the
fan's full speed is achieved with a register value of approximately 64 (0100 0000) to optimize speed range and resolution (see the Fan Speed Register section). The fourth bit selects the fan operating voltage. The fifth and sixth bits configure the operating mode. The MAX6650/MAX6651 have four modes of operation: full-on, full-off (shutdown), closed-loop, and open-loop. In closed-loop operation, the external microcontroller (C) sets the desired speed by writing an 8-bit word to the Fan-Speed Register (see the Fan-Speed Register section). The MAX6650/MAX6651 monitor the fan's tachometer output and automatically adjust the voltage
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
Table 4. Configuration Byte Register
BIT 7 (MSB) to 6 NAME -- POR (DEFAULT) STATE 0 Always 0 Operating Mode: 00 = Software full-on (default) 01 = Software off (shutdown) 10 = Closed-loop operation 11 = Open-loop operation Fan/Tachometer Voltage: 0 = 5V 1 = 12V (default) Prescaler Division: 000 = Divide by 1 001 = Divide by 2 010 = Divide by 4 (default) 011 = Divide by 8 100 = Divide by 16 FUNCTION
5 to 4
MODE
00
3
5/12V
1
2 to 0 (LSB)
SCALE
010
General-Purpose Input/Output
VCC VCC 3.0V TO 5.5V CBYPASS 100k GPIO_
MAX6650 MAX6651
GPIO STATUS REGISTER
GPIO DEFINITION REGISTER
GND
Figure 5. General-Purpose Input/Output Structure
across the fan until the desired speed is reached. Openloop operation allows the C to regulate fan speed directly. The C reads the fan speed from the Tachometer-Count Register. Based on the tachometer count, the C decides if the fan speed requires adjustment, and changes the voltage across the fan by writing an 8-bit word to the DAC Register. Full-on mode applies the maximum voltage across the fan, forcing it to spin at full speed. Configuring GPIO1 (see the General-Purpose Input/Output section) as an active-low input provides additional hardware control that fully turns on the fan and overrides all software commands.
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The GPIO pins connect to the drain of the internal Nchannel MOSFET and pullup resistor (Figure 5). When the N-channel MOSFET is off (Table 5), the pullup resistor provides a logic-level high output. However, with the MOSFET off, the GPIO may serve as an input pin and its state is read from the GPIO Status Register (Table 6). The MAX6650/MAX6651 power up with the MOSFET off, so input signals may be safely connected to the GPIO pins. When using the GPIO pin as a general-purpose output, change the output by writing to the GPIO Definition Register. GPIO0 may be configured as an ALERT output that will go low whenever a fault-condition is detected (see the Alarm-Enable and Status Registers section). GPIO1 may be configured as a FULL ON input to allow hardware control to fully turn on the fan in case of software or C failure. GPIO2 (MAX6651 only) may be configured as an internal clock output or as an external clock input to allow synchronization of multiple devices.
Alarm-Enable and Status Registers
The alarms are enabled only when the appropriate bits of the Alarm-Enable Register are set (Table 7). The maximum and minimum output level alarms function only when the device is configured to operate in the closedloop mode (see the Configuration-Byte Register section). The Alarm Status Register allows the system to determine which alarm caused the alert output (Table 8). The set-alarm and alert outputs clear after reading the
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
Table 5. GPIO Definition Register
BIT POR (DEFAULT) STATE PIN STATE FUNCTION
7 (MSB)
1
GPIO4 (MAX6651 only) GPIO3 (MAX6651 only) GPIO2 (MAX6651 only)
0 1 0 1 00
GPIO4 outputs a logic-level low. GPIO4 outputs a logic-level high or serves as an input. GPIO3 outputs a logic-level low. GPIO3 outputs a logic-level high or serves as an input. GPIO2 serves as an external clock input. GPIO2 serves as an internal clock output. GPIO2 outputs a logic-level low. GPIO2 outputs a logic-level high or serves as an input. GPIO1 outputs a logic-level high or serves as an input. GPIO1 serves as a FULL ON input. GPIO1 outputs a logic-level low. GPIO1 outputs a logic-level high or serves as an input. GPIO0 outputs a logic-level high or serves as an input. GPIO0 serves as an ALERT output. GPIO0 outputs a logic-level low. GPIO0 outputs a logic-level high or serves as an input.
6
1
5 to 4
11
01 10 11 00 01 10 11 00 01 10 11
3 to 2
11
GPIO1
11
GPIO0
Table 6. GPIO Status Register
BIT 7 (MSB) to 5 4 3 2 1 0 (LSB) NAME Always 0 GPIO4 (MAX6651 only) GPIO3 (MAX6651 only) GPIO2 (MAX6651 only) GPIO1 GPIO0 POR (DEFAULT) STATE 0 1 1 1 1 1
Alarm Status Register if the condition that caused the alarm is removed.
Tachometer
The Tachometer Count Registers record the number of pulses on the corresponding tachometer input during the period defined by the Tachometer Count-Time Register. The MAX6651 contains three additional tachometer inputs, which may be used to monitor additional fans. For accurate control of multiple fans, use identical fans.
The Tachometer Count-Time Register sets the integration time over which the MAX6650/MAX6651 count tachometer pulses. The devices can count up to 255 (FFh) pulses during the selected count time. If more than 255 pulses occur, the IC sets the overflow alarm and the Tachometer Count Register reports the maximum value of 255. Set the time register so the count register will not overflow under worst-case conditions (maximum fan speed) while maximizing resolution. Calculate the maximum measurable fan speed and minimum resolution with the following equations: Max Fan Speed (in RPS) = 255 / (2 x tCOUNT) Min Resolution (in RPS) = 1 / (2 x tCOUNT) where tCOUNT is the tachometer count time; 1kHz is the maximum allowable tachometer input frequency for the MAX6650/MAX6651. The first 6 bits of the Tachometer Count-Time Register are always zero, and the last 2 bits set the count time (Table 9). The count time may be determined from the following equation: tCOUNT = 0.25s x 2KCOUNT where KCOUNT is the numerical value of the two 2LSBs. The 0.25 factor has a 10% uncertainty.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
Table 7. Alarm-Enable Register Bit Masks
BIT 7 (MSB) to 5 4 3 2 1 0 (LSB) 1 = Enabled NAME -- GPIO2 (MAX6651 only) GPIO1 TACH MIN MAX POR (DEFAULT) STATE 0 0 0 0 0 0 Always 0 GPIO2 Alarm Enable/Disable (MAX6651 only) GPIO1 Alarm Enable/Disable Tachometer Overflow Alarm Enable/Disable Minimum Output Level Alarm Enable/Disable Maximum Output Level Alarm Enable/Disable FUNCTION
Table 8. Alarm Status Register Bit Assignments
BIT 7 (MSB) to 5 4 3 2 1 0 (LSB) 1 = Alarm condition NAME -- GPIO2 (MAX6651 only) GPIO1 TACH MIN MAX POR (DEFAULT) STATE 0 0 0 0 0 0 Always 0 GPIO2 Alarm. Set when GPIO2 is low (MAX6651 only). GPIO1 Alarm. Set when GPIO1 is low. Tachometer Overflow Alarm Minimum Output Level Alarm Maximum Output Level Alarm FUNCTION
Table 9. Tachometer Count-Time Register
(Assumes two pulses per revolution) REGISTER VALUE (KCOUNT) 0000 0000 0000 0001 0000 0010 0000 0011 COUNT TIME (s) 0.25 0.5 1.0 2.0 MAXIMUM FAN SPEED (RPS) 512 256 128 64 MINIMUM RESOLUTION (Hz/COUNT) 2 1 0.5 0.25
two input voltages are equal. The voltage at the FB pin may be determined by the following equation: VFB = (10 x VREF x KDAC) / 256 and the voltage across the fan is: 90k KDAC VFAN - V + 1 10k 256 REF where KDAC is the numerical value of the DAC Register and VREF = 1.5V. The minimum feedback voltage is limited by the voltage drop across the external MOSFET (RON x IFAN), and the maximum voltage is limited by the fan's supply voltage (VFAN). For linear operation, use DAC values between 08h and TB0h (see Typical Operating Characteristics). When using the closed-loop mode of operation, the contents of the DAC Register are ignored. When writing to the DAC, wait at least 500s before attempting to read back.
Upon power-up, the Tachometer Count Registers reset to 00h and the Tachometer Count-Time Register sets a 1s integration time.
Digital-to-Analog Converter
When using the open-loop mode of operation, the DAC Register sets the voltage on the low side of the fan. An internal operational amplifier compares the feedback voltage (VFB) with the reference voltage set by the 8-bit DAC, and adjusts the output voltage (VOUT) until the
Power-on Reset (POR)
The MAX6650/MAX6651 have volatile memory. To prevent ambiguous power-supply conditions from corrupting the data in the memory and causing erratic
12
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
VFAN 5V OR 12V VCC 3V TO 5.5V VCC 10k
MAX6650
I2C/SMBus INTERFACE SCL SDA TACH0 FB FAN
ALERT FULL ON
GPIO0 GPIO1
OUT ADD GND
CCOMP 10F
Figure 6. Fan Control with a Bipolar Transistor
behavior, a POR voltage detector monitors VCC and clears the memory if VCC falls below 1.6V. When power is first applied and VCC rises above 1.6V, the logic blocks begin operating (though reads and writes at VCC levels below 3V are not recommended). Power-up defaults include the following: * All alarms are disabled. * Prescale divider is set to 4. * Fan speed is set in full-on mode. See Table 2 for the default states of all registers.
dissipation in the power transistor can be approximated by P = (VFAN X IFAN(MAX)) / 4. Bipolar power transistors are practical for driving small and midsize fans (Figure 6). Very-high-current fans may require output transistor base current greater than the MAX6650's 50mA drive capability. Bipolar Darlington transistors will work but have poor saturation characteristics and could lose up to 2V to 3V of drive voltage.
Resistor Selection
The tachometer input voltages (VTACH_) and feedback voltage (V FB ) cannot exceed 13.2V (see Absolute Maximum Ratings). When using a fan powered by a 13.2V or greater supply (VFAN), protect these inputs from overvoltage conditions with series resistors. The resistance required to protect these pins may be calculated from the following equation: RPROTECT = [(VFAN(MAX) - 13.2V) x RIN] / 13.2V where VFAN(MAX) is the worst-case maximum supply voltage used to power the fan and RIN is the input impedance of the tachometer input (150k max) or the feedback input (150k max).
Applications Information
MOSFET and Bipolar Transistor Selection
The MAX6650/MAX6651 drive an external N-channel MOSFET that requires five important parameters for proper selection: gate-to-source conduction threshold, maximum gate-to-source voltage, drain-to-source breakdown voltage, current rating, and drain-to-source on-resistance (RDS(ON)). Gate-to-source conduction threshold must be compatible with available VCC. The maximum gate-to-source voltage and the drain-tosource breakdown voltage rating should both be at least a few volts higher than the fan supply voltage (VFAN). Choose a MOSFET with a maximum continuous drain current rating higher than the maximum fan current. RDS(ON) should be as low as practical to maximize the feedback voltage range. Maximum power
Compensation Capacitor
A compensation capacitor is needed from the fan's low side to ground to stabilize the analog control loop. Typically, this capacitor should be 10F, but depending on the type of fan being used, a value between 1F and 100F may be required. The proper value has
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
been selected when no ringing is present on the voltage at the fan's low side.
Fan Selection
For closed-loop operation and fan monitoring, the MAX6650/MAX6651 require fans with tachometer outputs. A tachometer output is typically specified as an option on many fan models from a variety of manufacturers. Verify the nature of the tachometer output (open collector, totempole) and the resultant levels, and configure the connection to the MAX6650/MAX6651 accordingly. Note how many pulses per revolution are generated by the tachometer output (this varies from model to model and
among manufacturers, though two pulses per revolution is the most common). Table 10 lists the representative fan manufacturers and the models they make available with tachometer outputs.
Low-Speed Operation
Brushless DC fans increase reliability by replacing mechanical commutation with electronic commutation. By lowering the voltage across the fan to reduce its speed, the MAX6650/MAX6651 are also lowering the supply voltage for the electronic commutation and tachometer electronics. If the voltage supplied to the fan is lowered too far, the internal electronics may no longer function properly. Some of the following symptoms are possible: * The fan may stop spinning. * The tachometer output may stop generating a signal. * The tachometer output may generate more than two pulses per revolution. The problems that occur, and the supply voltages at which they occur, depend on which fan is used. As a very rough rule of thumb, 12V fans can be expected to experience problems somewhere around 1/4 to 1/2 their rated speed.
Table 10. Fan Manufacturers
MANUFACTURER Comair Rotron FAN MODEL OPTION All DC brushless models can be ordered with optional tachometer output. Tachometer output optional on some models. All DC brushless models can be ordered with optional tachometer output. Panaflo and flat unidirectional miniature fans can be ordered with tachometer output. Tachometer output optional on some models.
EBM-Papst
NMB
Predicting Future Fan Failure
In systems that require maximum reliability, such as servers and network equipment, it can be advantageous to predict fan failure before it actually happens, to alert the system operator before the fan fails, minimizing down time. The MAX6650 allows the user to monitor the fan's condition through the following modes.
Panasonic
Sunon
VFAN 5V OR 12V 10k VCC 3V TO 5.5V VCC TACH0 10k FAN 0 FAN 1 10k TACH2 FB ALERT FULL ON GPIO0 GPIO1 OUT ADD GND CCOMP FAN 2
MAX6651 TACH1
I2C/SMBus INTERFACE SCL SDA
Figure 7. Using the MAX6651 to Control Parallel Fans 14 ______________________________________________________________________________________
Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
VCC
3V OR 5.5V
TACH0 TACH1 TACH2
FAN TACH 1 FAN TACH 2 FAN TACH 3
TO FAN VOLTAGE 5V OR 12V
MAX6651
TACH3
COM
NO0 NO1
FAN TACH 4 FAN TACH 5 FAN TACH 6 FAN TACH 7 FAN TACH 8 FAN TACH 9 FAN TACH 10 FAN TACH 11
MAX4051
GPIO2 GPIO3 GPIO4 ADDA ADDB ADDC INH GND
NO2 NO3 NO4 NO5 NO6 NO7 V-
Figure 8. Monitoring Multiple Fans
Full-On Mode By occasionally (over a period of days or weeks) turning the fan on full and measuring the resultant speed, a failing fan can be detected by a trend of decreasing speeds at a given power-supply voltage. Power-up is a convenient time to measure the maximum fan speed. Open-Loop Mode The fan's condition can also be monitored using openloop mode. By characterizing the fan while it is new, fan failure can be determined by writing a predetermined value to the DAC and measuring the resultant fan speed. A decrease over time of the resultant speed may be an indication of future fan failure. Closed-Loop Mode The MAX6650 allows the system to read the DAC value used to regulate the fan speed. For a given speed, a significant change in the required DAC value may indicate future fan problems.
TACH3 input. Because the TACH inputs are doublebuffered, and only sampled every other time slot, it is important to wait at least 4 times the tachometer count time before reading the register after changing the mux address. In the extreme case, a total of 25 fans can be monitored using three multiplexers connected to TACH1, TACH2, and TACH3. Do not connect TACH0 to a mux if the MAX6651 is under closed-loop mode.
N+1 Fan Application
As shown in Figure 9, if any MAX6650 cannot maintain speed regulation, all other fans will automatically be turned on full. This can be useful in high-reliability systems where any single fan failure should not cause downtime. The system should be designed so that the number of fans used is one more than are actually needed. This way, there is sufficient cooling even if a fan fails. With all fans operating correctly, it is unnecessary to run the fans at their maximum speed. Reducing fan speed can reduce noise and increase the life of the fans. However, once a fan fails, it is important that the remaining fans spin at their maximum speed. In Figure 9, all the GPIO0s are configured as ALERT outputs, and all the GPIO1s are configured as FULL ON inputs. If any MAX6650 generates an ALERT (indicating failure), the remaining MAX6650s will automatically turn their fans on full.
Monitoring More than 4 Fans
Use the MAX6651 to monitor up to four fans at a time (Figure 7). For systems requiring more than four fans, Figure 8 shows an application using an analog multiplexer (mux) to monitor 11 fans. GPIO2, GPIO3, and GPIO4 are connected to the mux's address pins. By writing the appropriate value to the GPIO pins, the desired tachometer gets selected and counted by the
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
TO INT PIN ON NC ALERT GPIO0
MAX6550
FAN 1
FULL ON ALERT
GPIO1 GPIO0
MAX6550
FULL ON ALERT
FAN 2
GPIO1 GPIO0
MAX6550
FAN 3
FULL ON ALERT
GPIO1 GPIO0
MAX6550
FAN 4
FULL ON
GPIO1
Figure 9. N+1 Application
Temperature Monitoring and Fan Control
The circuit shown in Figure 10 provides complete temperature monitoring and fan control. The MAX1617A (a remote/local temperature serial interface with SMBus) monitors temperature with a diode-connected transistor. Based on the temperature readings provided by the MAX1617A, the C can adjust the fan speed proportionally with temperature. Connecting the ALERT output of the MAX1617A to the FULL ON input of the MAX6650/MAX6651 (see the General-Purpose Input/ Output section) allows the fan to turn on fully if the MAX1617A detects an overtemperature condition. MAX6501 Hardware Fail-Safe Figure 11 shows an application using a MAX6501 as a hardware fail-safe. The MAX6650 has its GPIO1 configured as FULL ON input. The MAX6501 TOVER pin goes low whenever its temperature goes above a preset value. This pulls the FULL ON pin (GPIO1) low, forcing the fan to spin at its maximum speed. Figure 12 shows the use of multiple MAX6501s. The MAX6501 has an open-drain output, allowing multiple devices to be wire ORed to the FULL ON input. This configuration allows fail-safe monitoring of multiple locations around the system.
causing an interrupt. This signals to the system that a hot swap is occurring.
Step-by-Step Part Selection and Software Setup
Determining the Fan System Topology
The MAX6650/MAX6651 support three fan system topologies. These are single fan control, parallel fan control, and synchronized fan control. Single Fan Control The simplest configuration is a single MAX6650 for each fan. If two or more fans are required per system, then additional MAX6650 controllers are used (one per fan). The advantage of this configuration is the ability to independently control each fan. The disadvantage is cost, size, and complexity. For single fan control, use the MAX6650 (unless additional GPIOs are needed). Parallel Fan Control If multiple fans are required but independent control is not, then a single MAX6650/MAX6651 connected to two or more fans in parallel may make sense (Figure 7). The obvious advantage is simplicity, size, and cost savings. If all the fans connected in parallel are the same type, they will tend to run at similar speeds. However, if one or more of the fans are wearing out, speed mismatches can occur. The MAX6651 allows the system to monitor
Hot-Swap Application
Hot swapping of a fan can be detected using the circuit in Figure 13 where GPIO2 is configured to generate an alert whenever it is pulled low. As long as the fan card is connected, GPIO2 is high. However, when the fan card is removed, a 2.2k resistor pulls GPIO2 low,
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
GND
ADD1
ADD0 STBY
MAX1617A
TEMPERATURE SENSOR DXP
VCC
DXN
SCL INTERRUPT TO C SDA ALERT
VCC GPIO0
ALERT
GPIO1 VCC
FULL ON
MAX6650 MAX6651
VFAN = 5V OR 12V
C SCL SCL TACH0 FAN
SDA
SDA
FB
GND
VCC ADD
OUT
GND
Figure 10. Temperature Monitoring and Fan Control ______________________________________________________________________________________ 17
Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
VFAN 5V OR 12V VCC 3V TO 5.5V VCCIN 10k
MAX6650
I2C/SMBus INTERFACE ALERT SCL SDA GPIO0 CCOMP 10F TACH0 FB FAN
OUT
MAX6501
FULL ON
TOVER
GPIO1
ADD GND
Figure 11. MAX6501 Hardware Fail-Safe
VFAN 5V OR 12V VCC 3V TO 5.5V VCCIN 10k
MAX6650
I2C/SMBus INTERFACE ALERT
MAX6501
SCL SDA GPIO0
TACH0 FB
FAN
TOVER FULL ON
MAX6501
OUT GPIO1 ADD GND
CCOMP 10F
TOVER
MAX6501
TOVER
Figure 12. MAX6501 Hardware Fail-Safe
up to four fans, ensuring any significant speed mismatches can be detected. For parallel fan control while monitoring up to four fan speeds, select the MAX6651. For parallel fan control while monitoring only a single fan, select the MAX6650.
Synchronized Fan Control (MAX6651 Only) In systems with multiple fans, an audible beat frequency can sometimes be detected due to fan speed mismatch. This happens in systems where fans are connected in parallel or in systems with a MAX6650 controlling each fan. In parallel fan systems, speed mismatches occur because no two fans are identical. Slight mechanical variations or loading differences can result in enough of a speed mismatch to cause an audible beat.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
VFAN 5V OR 12V VCC 3V TO 5.5V VCCIN 10k HOT-SWAP SECTION
MAX6651
I2C/SMBus INTERFACE ALERT SCL SDA GPIO0 CCOMP 10F TACH0 FB FAN
OUT FULL ON GPIO1 ADD GND
VID GPIO2 2.2k
Figure 13. Hot-Swap Application
Even in systems where there is a MAX6650/MAX6651 for each fan, there can still be speed mismatches. This is primarily due to the oscillator tolerance. The MAX6650/MAX6651 oscillator tolerance is specified to be 10%. In the worst case, this could result in a 20% (one 10% high, one 10% low) speed mismatch. The solution is to use a single MAX6651 for each fan, and configure the parts to use a shared clock. The shared clock can either be an external system clock or one of the MAX6651s' internal clocks. If an external clock is used, its frequency can range from approximately 50kHz to 500kHz. For synchronized fan control, select the MAX6651. Combination In more complex systems, a combination of some or all of the above control types may be needed.
Configuring this bit also adjusts the tachometer input threshold voltage. This optimizes operation of the MAX6650/MAX6651 for the operating voltage of the fan being used.
Setting the Mode of Operation
The MAX6650/MAX6651 have four modes of operation as determined by bits 5 and 6 of the configuration register: full on, full off, open loop, and closed loop. Full-On The full-on mode applies the maximum available voltage across the fan, guaranteeing maximum cooling. Full-on mode can be entered through software or hardware control. To enter full-on mode through hardware, see the Setting Up the GPIOs section. Note that a hardware full-on overrides all other modes. Configure the MAX6650/MAX6651 to run in software full-on mode by entering 00 into bits 5 and 4 of the configuration register. Full-Off The full-off mode removes all the voltage across the fan, causing the fan to stop. Because the MAX6650/
Choosing a Fan
Once the topology is chosen, the next step is to choose a fan. See the appropriate section. Enter a zero in bit 3 of the configuration register for a 5V fan and 1 for a 12V fan.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
MAX6651 work by controlling the voltage on the low side of the fan, either 5V or 12V will be on both leads. Enter full-off mode by entering 01 into bits 5 and 4 of the configuration register. Open Loop In open-loop mode, the MAX6650/MAX6651 do not actually regulate the fan speed. Speed regulation requires an external C. Although open-loop mode allows maximum flexibility, it also requires the most software/processor overhead. In open-loop mode, the MAX6650/MAX6651 act as an I2C/SMB-controlled voltage regulator. The C adjusts the voltage across the fan by writing an 8-bit value to the DAC register. This gives the C direct control of the voltage across the fan. Speed regulation is accomplished by periodically reading the tachometer register(s) and adjusting the DAC register appropriately. The DAC value controls the voltage across the fan according to the following equation: VFAN = VFAN_SUPPLY - [((R2) / R1) + 1] x VREF x KDAC / 256 where VFAN = the voltage across the fan, VFAN_SUPPLY = the supply voltage for the fan (5V or 12V), R2 = 90k (typ), R1 = 10k (typ), VREF = 1.5V (typ), and KDAC = the value in the DAC register. Note several important things in this equation. First, the voltage across the fan moves in the opposite direction of the DAC value. In other words, low DAC values correspond to higher voltages across the fan and therefore higher speeds. Second, DAC values greater than 90k will result in 0V across a 12V fan. Similarly, DAC values greater than 76 will produce 0V across a 5V fan. This limits the useful range of the DAC from 0 to 180 for 12V fans and 0 to 76 for 5V fans. Remember that device tolerances can cause the output voltage value to vary significantly from unit to unit and over temperature. However, because this voltage is within a closed speed-control loop, such errors are corrected by the loop. Below is a possible strategy for controlling the fan under open-loop mode: 1) On power-up, put the device in open-loop mode with a DAC value of 00 (full speed). 2) Allow the fan speed to settle. 3) Read the TACH register to determine the speed. 4) Gradually increase the DAC register value (in steps of 1 or 2) until the desired speed is obtained. In open-loop mode, any one of the four tachometer registers (MAX6651) can be used to measure and regulate the fan's speed. This is especially useful in parallel fan systems where up to four fans will be controlled as one unit. Care must be taken with this mode to prevent instability, which can be caused by trying to update the fan speed too often or in increments that are too large. Instability can result in the fan speeding up and slowing down repeatedly. Determining the proper update rate, as shown in the following steps, depends largely on the fan's mechanical time constant and the system's loop gain (DAC step sizes): 1) Enter open-loop mode by setting bits 5 and 4 of the control register to 11. 2) Determine the speed of the fan(s) by reading the TACH register(s). 3) Increase or decrease the DAC register to decrease or increase the voltage across the fan, thereby adjusting its speed. Closed Loop In closed-loop mode, the I2C/SMBus master (usually a C) writes a desired fan speed to the MAX6650/ MAX6651, and the device automatically adjusts the voltage across the fan to maintain this speed. This operation mode requires less software/processor overhead than the open-loop mode. Once the desired speed has been written, the MAX6650/MAX6651 control the fan's speed independently, with no intervention required from the master. If desired, the MAX6650/ MAX6651 can be configured to generate an interrupt if it is unable to regulate the fan's speed at the desired value (see Setting Up Alarms). The MAX6650/MAX6651 can regulate only the speed of the fan connected to the TACH0 input. Fans connected in parallel to the TACH0 fan will tend to run at similar speeds (assuming similar fans). The MAX6650 regulates fan speed in the following manner. The output of an internal 254kHz oscillator is divided by 128, generating a roughly 2kHz signal. This signal is divided by 1 plus the value in the speed register and is used as a reference frequency. For example, 02h in the speed register will result in a 667Hz [2kHz / (02h+1)] reference frequency, which is then compared against the frequency at the tachometer input divided by the prescaler value. The MAX6650/MAX6651 attempt to keep the tachometer frequency divided by the prescaler equal to the reference frequency by adjusting the voltage across the fan. If the tachometer frequency divided by the prescaler value is less than the reference frequency, the voltage across the fan is increased. Remember that the tachometer will give two
20
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
pulses per revolution of the fan. The following equations describe the operation. When in regulation: [fCLK / (128 x (KTACH + 1))] = 2 x FanSpeed / KSCALE where fCLK = oscillator frequency (either the 254kHz internal oscillator or the externally applied clock), KTACH = the value in the speed register, FanSpeed = the speed of the fan in revolutions per second (Hz), KSCALE = the prescaler value (1, 2, 4, 8, or 16). Solving for all four variables: KTACH = [(fCLK x KSCALE) / (256 x FanSpeed)] - 1 KSCALE = [256 x FanSpeed x (KTACH + 1)] / fCLK FanSpeed = KSCALE x fCLK / [256 x (KTACH + 1)] fCLK = 256 x FanSpeed x (KTACH + 1) / KSCALE If the internal oscillator is used, setting fCLK to 254kHz can further reduce the equations: Equation 1: KSCALE = FanSpeed x (KTACH + 1) / 992 Equation 2: KTACH = (992 x KSCALE / FanSpeed) - 1 Equation 3: FanSpeed = 992 x KSCALE / (KTACH + 1) Enter closed-loop mode by entering 10 into bits 5 and 4 of the configuration register. Note that in equation 3, the fan speed is inversely proportional to (KTACH + 1). This means the regulated fan speed is a nonlinear function of the value written to the speed register. Low values written to the speed register can result in large relative changes in fan speed. For best results, design the system so that small values (such as 02h) are not needed. This is easily accomplished because an 8-bit speed register is used, and fan-speed control should rarely need more than 16 speeds. A good compromise is to design the system (by selecting the appropriate prescaler value) so that the maximum-rated speed of the fan occurs when the speed register equals approximately 64 (decimal). Although 64 is a good target value, values between 20 and 100 will work fine. The prescaler value also affects the response time and the stability of the speed-control loop. Adjusting the prescaler value effectively adjusts the loop gain. A larger prescaler value will slow the response time and increase stability, while a smaller prescaler value will yield quicker response time. The optimum prescaler value for response time and stability depends on the fan's mechanical time constant. Small, fast-spinning fans will tend to have small mechanical time constants and can benefit from smaller prescaler values. A good rule of thumb is to try the selected prescaler value in the target system. Set K TACH to around 75% of full scale, and watch for overshoot or oscillation in the fan speed. Also look for overshoot or oscillation when KTACH is changed from one value to another (e.g., from 75% of full-scale speed to 90% of full scale). If there is unacceptable overshoot or if the fan speeds up and slows down with K TACH , set it to a constant value; increase the prescaler value. Enter the appropriate prescaler value in bits zero to 2 of the configuration register. Fan speed is a trade-off between cooling requirements, noise, power, and fan wear. In general, it is desirable (within limits) to run the fan at the slowest speed that will accomplish the cooling goals. This will reduce power consumption, increase fan life, and minimize noise. When calculating the desired fan speed, remember that the above equations are written in rotations per second (RPS), where most fans are specified in rotations per minute (RPM). Write the desired fan speed to the speed register. Example: Assume the following: * 12V fan is rated at 2000RPM at 12V. * Use the internal oscillator (fCLK = 254kHz). * Desired fan speed = 1500RPM (25RPS). First, calculate an appropriate prescaler value (KSCALE) using equation 1. Attempt to get KTACH as close to 64 as possible for the maximum speed of 2000RPM. * Set FanSpeed = 33.3RPS (2000RPM/60). * Set KTACH = 64. * Solving equation 1 gives KSCALE = 2.18. We will start with KSCALE = 2 (to increase stability, a 4 could be tried, or to improve response time, a 1 could be tried). Second, calculate the appropriate value for the Speed Register (KTACH) using equation 2. * Set FanSpeed = 25RPS (1500PRM/60). * Solving for equation 2 gives KTACH = 78 for KSCALE = 2, KTACH = 39 for KSCALE = 1, or KTACH = 158 for K = 4.
Determining the Tachometer Count Time
To monitor the fan speed using the I2C/SMBus, the next step is to determine the tachometer count time. In systems running in open-loop mode, this is necessary. In closed-loop or full-speed mode, reading the tachometer can serve as a valuable check to ensure the fan and the control loop are operating properly.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
The MAX6650/MAX6651 use an 8-bit counter to count the tachometer pulses. This means the device can count from 0 to 255 tachometer pulses before overflowing. The MAX6650/MAX6651 can accommodate a large range of fan speeds by allowing the counting interval to be programmed. Smaller/faster fans should use smaller count times. Although larger fans could also use smaller count times, resolution would suffer. Choose the slowest count time that will not overflow under worstcase conditions. Fans are mechanical devices, and their speeds are subject to large tolerance variations. If an overflow does occur, the counter will read 255. The MAX6650/MAX6651 can be configured to generate an alert if an overflow is encountered (see Setting Up Alarms). Note that the prescaler value has no effect on the TACH0 register. Enter the appropriate count-time value in the tachometer count-time register. Example: Assume a 12V fan rated at 2000 RPM. To accommodate large tolerance variations, choose a count time appropriate for a maximum speed of 3000RPM; 3000RPM is 50RPS and generates a 100Hz (2 pulses/revolution) tachometer signal. Table 9 indicates a count time of 2s will optimize resolution. With a 2s count time, speeds as fast as 3825RPM can be monitored without overflow. The minimum resolution will be 15RPM or 0.75% of the rated speed of 2000RPM. For GPIO3 and GPIO4, write a 1 to the appropriate location in the GPIO definition register. For GPIO0, GPIO1, and GPIO2, write an 11 to the appropriate location in the GPIO definition register. Digital Input Since a logic-level high output is open drain with an internal pullup, an external device can actively pull this pin low. The MAX6650/MAX6651 allow the user to read the GPIO value through the GPIO status register. * Configure the GPIO as an output logic level high (see above). * Read the state of the GPIO by reading the GPIO status register. Alert Output GPIO0 can also serve as an ALERT output. The ALERT output is designed to drive an interrupt on a C. The ALERT output goes low whenever an enabled alarm condition occurs (see Setting Up Alarms). Configure GPIO0 as an ALERT output by writing a 01 to bits 1 and 0 of the GPIO definition register. Full-On Input GPIO1 can also be configured as a full-on input. When the full-on pin is pulled low, the MAX6650/MAX6651 apply the full available voltage across the fan. This happens independently of the software mode of operation. This is a particularly valuable feature in high-reliability systems, designed to prevent software malfunctions from causing system overheating. Configure GPIO1 as a full-on input by writing a 01 to bits 3 and 2 of the GPIO definition register. Synchronizing Fans GPIO2 can be configured to allow multiple MAX6651s to synchronize the speeds of the fans they are driving (Figure 14). Synchronization is accomplished by having one of the MAX6651s (or an external clock) serve as the clock master by configuring one of the GPIO2s in the system as a clock output. The remaining GPIO2s in the system need to be configured as clock inputs: * Electrically connect all MAX6651 GPIO2s together. * Configure one of the MAX6651's GPIO2s to be a clock output, using the GPIO Definition Register (set bits 5 and 4 to 01). * Configure the rest of the GPIO2s as clock inputs, using the GPIO Definition Register (set bits 5 and 4 to 00). * Configure all MAX6651s in closed-loop mode. * Configure all prescaler values to be equal. * Write identical values to all speed registers.
Setting Up the GPIOs
To increase versatility, the MAX6650/MAX6651 have two and five general-purpose digital inputs/outputs, respectively. These GPIOs can be configured through the I2C/SMBus. Digital Out Low All GPIOs can be configured to output a logic-level low. The MAX6650/MAX6651 are designed to sink up to 10mA. This high sink current can be especially useful for driving LEDs. For GPIO3 and GPIO4, write a zero to the appropriate location in the GPIO definition register. For GPIO0, GPIO1, and GPIO2, write a 10 to the appropriate location in the GPIO definition register. Digital Out High All GPIOs can be configured to generate a logic-level high. An output high is generated using an open-drain output stage with an internal pullup resistor of nominally 100k. The MAX6650/MAX6651 power-up default state is with all GPIOs configured as output highs.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface
Setting Up Alarms
The MAX6650/MAX6651 can be configured to generate an ALERT output on GPIO0 whenever certain events, such as control loop out of regulation, tachometer overflow, or GPI01/GPI02 being driven low, occur. This is designed to enhance the "set and forget" functionality of the fan control system. Configure GPIO0 to be an ALERT output (see above). Minimum/Maximum Output Level Alarm The minimum/maximum output level alarms are designed to warn the system when the MAX6650/ MAX6651 are unable to maintain speed regulation in closed-loop mode. The MAX6650/MAX6651 maintain speed regulation by adjusting the voltage across the fan. If the desired speed can't be attained, one of these alarms will be generated. Possible causes for failure to attain the desired speed include system programming problems, incipient fan failure, and a programmed speed that the fan cannot support. The minimum output alarm occurs when the DAC output is 00h. A DAC value of 00h means that the MAX6650/MAX6651 have applied the largest available voltage across the fan. This typically means the fan is unable to spin as fast as the desired speed. The maximum output alarm occurs when the DAC value is FFh. A DAC value of FFh means the MAX6650/MAX6651 have tried to reduce the voltage across the fan to 0. Although this would seem to indicate the fan is spinning faster than the desired speed, this should rarely happen. If this alarm occurs, it probably indicates some type of system error. Enable the minimum/maximum output level alarm by setting bits 0 and 1 of the alarm enable register to 11. Tachometer Overflow Alarm If any tachometer counter overflows (reaches a count of 255), this alarm will be set. Enable the overflow output level alarm by setting bit 2 of the alarm enable register bit to 1. GPIO1/2 Pulled Low Enabling this alarm causes the ALERT output to go low whenever GPIO1 or GPIO2 is pulled low. This will occur independent of the configuration of GPIO1 or GPIO2.
MAX6501 MAX6501
MAX6650/MAX6651
CLOCK OUT
FAN 1
GPIO2
CLOCK IN
FAN 2
GPIO2
MAX6501
CLOCK IN
FAN 3
GPIO2
Figure 14. Synchronizing Fans
Enable the GPIO1/GPIO2 output level alarms by setting bits 3 and/or 4 of the alarm enable register bit to 1. Clearing the ALERT Once an ALERT is generated, determine which alarm caused the ALERT pin to go low. Do this by reading the Alarm Status Register. An ALERT output will stay active (low) even if the condition that caused the alert is removed. Reading the Alarm Status Register clears the ALERT, if the condition that caused the alert is gone. If the condition has not gone away, the ALERT will stay active. Disabling the alarm with the Alarm Enable Register will cause the ALERToutput to go inactive. Read the Alarm Status Register.
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
Pin Configurations
TOP VIEW
TACH0 1 GND SDA SCL ADD 2 3 4 5 10 FB 9 VCC OUT GPIO0 GPIO1 TACH0 1 TACH2 2 TACH3 3 GND 4 SDA 5 SCL 6 GPIO4 7 ADD 8 16 TACH1 15 FB 14 VCC
MAX6650
8 7 6
MAX6651
13 OUT 12 GPIO3 11 GPIO2 10 GPIO0 9 GPIO1
MAX
QSOP
24
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface
Package Information
MAX6650/MAX6651
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
NOTES
26
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Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
NOTES
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27
Fan-Speed Regulators and Monitors with I2C/SMBus Interface MAX6650/MAX6651
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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